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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Altera SOCFPGA Reset Manager maintainers: - Dinh Nguyen <dinguyen@kernel.org> properties: compatible: oneOf: - description: Cyclone5/Arria5/Arria10 const: altr,rst-mgr - description: Stratix10 ARM64 SoC items: - const: altr,stratix10-rst-mgr - const: altr,rst-mgr reg: maxItems: 1 altr,modrst-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset of the first modrst register '#reset-cells': const: 1 required: - compatible - reg - '#reset-cells' if: properties: compatible: contains: const: altr,stratix10-rst-mgr then: properties: altr,modrst-offset: false additionalProperties: false examples: - | rstmgr@ffd05000 { compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; altr,modrst-offset = <0x10>; #reset-cells = <1>; }; |