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| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/ti,ads131m02.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments ADS131M0x 2-, 3-, 4-, 6- and 8-Channel ADCs maintainers: - Oleksij Rempel <o.rempel@pengutronix.de> description: | The ADS131M0x are a family of multichannel, simultaneous sampling, 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a built-in programmable gain amplifier (PGA) and internal reference. Communication with the ADC chip is via SPI. Datasheets: - ADS131M02: https://www.ti.com/lit/ds/symlink/ads131m02.pdf - ADS131M03: https://www.ti.com/lit/ds/symlink/ads131m03.pdf - ADS131M04: https://www.ti.com/lit/ds/symlink/ads131m04.pdf - ADS131M06: https://www.ti.com/lit/ds/symlink/ads131m06.pdf - ADS131M08: https://www.ti.com/lit/ds/symlink/ads131m08.pdf properties: compatible: enum: - ti,ads131m02 - ti,ads131m03 - ti,ads131m04 - ti,ads131m06 - ti,ads131m08 reg: description: SPI chip select number. clocks: description: Phandle to the external clock source required by the ADC's CLKIN pin. The datasheet recommends specific frequencies based on the desired power mode (e.g., 8.192 MHz for High-Resolution mode). maxItems: 1 avdd-supply: description: Analog power supply (AVDD). dvdd-supply: description: Digital power supply (DVDD). interrupts: description: DRDY (Data Ready) output signal. maxItems: 1 reset-gpios: description: Optional RESET signal. maxItems: 1 clock-names: description: Indicates if a crystal oscillator (XTAL) or CMOS signal is connected (CLKIN). Note that XTAL mode is only supported on ADS131M06 and ADS131M08. enum: [xtal, clkin] refin-supply: description: Optional external reference supply (REFIN). '#address-cells': const: 1 '#size-cells': const: 0 required: - compatible - reg - clocks - clock-names - avdd-supply - dvdd-supply patternProperties: "^channel@[0-7]$": type: object $ref: /schemas/iio/adc/adc.yaml# description: Properties for a single ADC channel. properties: reg: description: The channel index (0-7). minimum: 0 maximum: 7 # Max channels on ADS131M08 label: true required: - reg unevaluatedProperties: false allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: # 20-pin devices: M02, M03, M04 # These do not support XTAL or REFIN. properties: compatible: enum: - ti,ads131m02 - ti,ads131m03 - ti,ads131m04 then: properties: clock-names: const: clkin refin-supply: false - if: # ADS131M02: 2 channels max (0-1) properties: compatible: contains: const: ti,ads131m02 then: patternProperties: "^channel@[0-1]$": properties: reg: maximum: 1 "^channel@[2-7]$": false - if: # ADS131M03: 3 channels max (0-2) properties: compatible: contains: const: ti,ads131m03 then: patternProperties: "^channel@[0-2]$": properties: reg: maximum: 2 "^channel@[3-7]$": false - if: # ADS131M04: 4 channels max (0-3) properties: compatible: contains: const: ti,ads131m04 then: patternProperties: "^channel@[0-3]$": properties: reg: maximum: 3 "^channel@[4-7]$": false - if: # ADS131M06: 6 channels max (0-5) properties: compatible: contains: const: ti,ads131m06 then: patternProperties: "^channel@[0-5]$": properties: reg: maximum: 5 "^channel@[6-7]$": false unevaluatedProperties: false examples: - | #include <dt-bindings/clock/stm32mp1-clks.h> spi1 { #address-cells = <1>; #size-cells = <0>; adc@0 { compatible = "ti,ads131m02"; reg = <0>; spi-max-frequency = <8000000>; clocks = <&rcc CK_MCO2>; clock-names = "clkin"; avdd-supply = <&vdd_ana>; dvdd-supply = <&vdd_dig>; #address-cells = <1>; #size-cells = <0>; channel@0 { reg = <0>; label = "input_voltage"; }; channel@1 { reg = <1>; label = "input_current"; }; }; }; |