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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP LPC3220 SoC ADC controller maintainers: - Gregory Clement <gregory.clement@bootlin.com> description: This hardware block has been used on several LPC32XX SoCs. properties: compatible: const: nxp,lpc3220-adc reg: maxItems: 1 interrupts: maxItems: 1 vref-supply: true "#io-channel-cells": const: 1 required: - compatible - reg - interrupts additionalProperties: false examples: - | soc { #address-cells = <1>; #size-cells = <1>; adc@40048000 { compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupt-parent = <&mic>; interrupts = <39 0>; vref-supply = <&vcc>; }; }; ... |