Based on kernel version 6.12.4
. Page generated on 2024-12-12 21:01 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/adi,ad4000.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD4000 and similar Analog to Digital Converters maintainers: - Marcelo Schmitt <marcelo.schmitt@analog.com> description: | Analog Devices AD4000 family of Analog to Digital Converters with SPI support. Specifications can be found at: https://www.analog.com/media/en/technical-documentation/data-sheets/ad4000-4004-4008.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad4001-4005.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad4002-4006-4010.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad4003-4007-4011.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad4020-4021-4022.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4001.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4003.pdf $ref: /schemas/spi/spi-peripheral-props.yaml# properties: compatible: oneOf: - const: adi,ad4000 - items: - enum: - adi,ad4004 - adi,ad4008 - const: adi,ad4000 - const: adi,ad4001 - items: - enum: - adi,ad4005 - const: adi,ad4001 - const: adi,ad4002 - items: - enum: - adi,ad4006 - adi,ad4010 - const: adi,ad4002 - const: adi,ad4003 - items: - enum: - adi,ad4007 - adi,ad4011 - const: adi,ad4003 - const: adi,ad4020 - items: - enum: - adi,ad4021 - adi,ad4022 - const: adi,ad4020 - const: adi,adaq4001 - const: adi,adaq4003 reg: maxItems: 1 spi-max-frequency: maximum: 102040816 # for VIO > 2.7 V, 81300813 for VIO > 1.7 V adi,sdi-pin: $ref: /schemas/types.yaml#/definitions/string enum: [ high, low, cs, sdi ] default: sdi description: Describes how the ADC SDI pin is wired. A value of "sdi" indicates that the ADC SDI is connected to host SDO. "high" indicates that the ADC SDI pin is hard-wired to logic high (VIO). "low" indicates that it is hard-wired low (GND). "cs" indicates that the ADC SDI pin is connected to the host CS line. '#daisy-chained-devices': true vdd-supply: description: A 1.8V supply that powers the chip (VDD). vio-supply: description: A 1.8V to 5.5V supply for the digital inputs and outputs (VIO). ref-supply: description: A 2.5 to 5V supply for the external reference voltage (REF). cnv-gpios: description: When provided, this property indicates the GPIO that is connected to the CNV pin. maxItems: 1 adi,high-z-input: type: boolean description: High-Z mode allows the amplifier and RC filter in front of the ADC to be chosen based on the signal bandwidth of interest, rather than the settling requirements of the switched capacitor SAR ADC inputs. adi,gain-milli: description: | The hardware gain applied to the ADC input (in milli units). The gain provided by the ADC input scaler is defined by the hardware connections between chip pins OUT+, R1K-, R1K1-, R1K+, R1K1+, and OUT-. If not present, default to 1000 (no actual gain applied). $ref: /schemas/types.yaml#/definitions/uint16 enum: [454, 909, 1000, 1900] default: 1000 interrupts: description: The SDO pin can also function as a busy indicator. This node should be connected to an interrupt that is triggered when the SDO line goes low while the SDI line is high and the CNV line is low ("3-wire" mode) or the SDI line is low and the CNV line is high ("4-wire" mode); or when the SDO line goes high while the SDI and CNV lines are high (chain mode), maxItems: 1 required: - compatible - reg - vdd-supply - vio-supply - ref-supply allOf: # The configuration register can only be accessed if SDI is connected to MOSI - if: required: - adi,sdi-pin then: properties: adi,high-z-input: false # chain mode has lower SCLK max rate - if: required: - '#daisy-chained-devices' then: properties: spi-max-frequency: maximum: 50000000 # for VIO > 2.7 V, 40000000 for VIO > 1.7 V # Gain property only applies to ADAQ devices - if: properties: compatible: not: contains: enum: - adi,adaq4001 - adi,adaq4003 then: properties: adi,gain-milli: false unevaluatedProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> spi { #address-cells = <1>; #size-cells = <0>; adc@0 { compatible = "adi,ad4020"; reg = <0>; spi-max-frequency = <71000000>; vdd-supply = <&supply_1_8V>; vio-supply = <&supply_1_8V>; ref-supply = <&supply_5V>; adi,sdi-pin = "cs"; cnv-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH>; }; }; - | spi { #address-cells = <1>; #size-cells = <0>; adc@0 { compatible = "adi,adaq4003"; reg = <0>; spi-max-frequency = <80000000>; vdd-supply = <&supply_1_8V>; vio-supply = <&supply_1_8V>; ref-supply = <&supply_5V>; adi,high-z-input; adi,gain-milli = /bits/ 16 <454>; }; }; |