Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas R-Car GyroADC maintainers: - Marek Vasut <marek.vasut+renesas@gmail.com> description: | The GyroADC block is a reduced SPI block with up to 8 chipselect lines, which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs are sampled by the GyroADC block in a round-robin fashion and the result presented in the GyroADC registers. The ADC bindings should match with that of the devices connected to a full featured SPI bus. properties: compatible: items: - enum: - renesas,r8a7791-gyroadc - renesas,r8a7792-gyroadc - const: renesas,rcar-gyroadc reg: maxItems: 1 clocks: maxItems: 1 clock-names: const: fck power-domains: maxItems: 1 resets: maxItems: 1 "#address-cells": const: 1 "#size-cells": const: 0 additionalProperties: false required: - compatible - reg - clocks - clock-names - power-domains - resets - "#address-cells" - "#size-cells" patternProperties: "@[0-7]$": type: object properties: compatible: description: | fujitsu,mb88101a - Fujitsu MB88101A compatible mode, 12bit sampling, up to 4 channels can be sampled in round-robin fashion. One Fujitsu chip supplies four GyroADC channels with data as it contains four ADCs on the chip and thus for 4-channel operation, single MB88101A is required. The Cx chipselect lines of the MB88101A connect directly to two CHS lines of the GyroADC, no demuxer is required. The data out line of each MB88101A connects to a shared input pin of the GyroADC. ti,adcs7476 or ti,adc121 or adi,ad7476 - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit sampling, up to 8 channels can be sampled in round-robin fashion. One TI/ADI chip supplies single ADC channel with data, thus for 8-channel operation, 8 chips are required. A 3:8 chipselect demuxer is required to connect the nCS line of the TI/ADI chips to the GyroADC, while MISO line of each TI/ADI ADC connects to a shared input pin of the GyroADC. maxim,max1162 or maxim,max11100 - Maxim MAX1162 / Maxim MAX11100 compatible mode, 16bit sampling, up to 8 channels can be sampled in round-robin fashion. One Maxim chip supplies single ADC channel with data, thus for 8-channel operation, 8 chips are required. A 3:8 chipselect demuxer is required to connect the nCS line of the MAX chips to the GyroADC, while MISO line of each Maxim ADC connects to a shared input pin of the GyroADC. enum: - adi,ad7476 - fujitsu,mb88101a - maxim,max1162 - maxim,max11100 - ti,adcs7476 - ti,adc121 reg: minimum: 0 maximum: 7 vref-supply: true additionalProperties: false required: - compatible - reg - vref-supply examples: - | #include <dt-bindings/clock/r8a7791-cpg-mssr.h> #include <dt-bindings/power/r8a7791-sysc.h> adc@e6e54000 { compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; reg = <0xe6e54000 64>; clocks = <&cpg CPG_MOD 901>; clock-names = "fck"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 901>; #address-cells = <1>; #size-cells = <0>; adc@0 { reg = <0>; compatible = "maxim,max1162"; vref-supply = <&vref_max1162>; }; adc@1 { reg = <1>; compatible = "maxim,max1162"; vref-supply = <&vref_max1162>; }; }; ... |