Based on kernel version 7.0. Page generated on 2026-04-23 09:49 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SA8255P UFS Host Controller maintainers: - Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com> properties: compatible: const: qcom,sa8255p-ufshc reg: maxItems: 1 interrupts: maxItems: 1 iommus: maxItems: 1 dma-coherent: true power-domains: maxItems: 1 required: - compatible - reg - interrupts - power-domains - iommus - dma-coherent allOf: - $ref: ufs-common.yaml unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> ufshc@1d84000 { compatible = "qcom,sa8255p-ufshc"; reg = <0x01d84000 0x3000>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; lanes-per-direction = <2>; iommus = <&apps_smmu 0x100 0x0>; power-domains = <&scmi3_pd 0>; dma-coherent; }; |