Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas R-Car UFS Host Controller maintainers: - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> allOf: - $ref: ufs-common.yaml properties: compatible: const: renesas,r8a779f0-ufs reg: maxItems: 1 clocks: maxItems: 2 clock-names: items: - const: fck - const: ref_clk power-domains: maxItems: 1 resets: maxItems: 1 required: - compatible - reg - clocks - clock-names - power-domains - resets unevaluatedProperties: false examples: - | #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a779f0-sysc.h> ufs: ufs@e686000 { compatible = "renesas,r8a779f0-ufs"; reg = <0xe6860000 0x100>; interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; clock-names = "fck", "ref_clk"; freq-table-hz = <200000000 200000000>, <38400000 38400000>; power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; resets = <&cpg 1514>; }; |