Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek Universal Flash Storage (UFS) Controller maintainers: - Stanley Chu <stanley.chu@mediatek.com> allOf: - $ref: ufs-common.yaml properties: compatible: enum: - mediatek,mt8183-ufshci - mediatek,mt8192-ufshci clocks: maxItems: 1 clock-names: items: - const: ufs phys: maxItems: 1 reg: maxItems: 1 vcc-supply: true required: - compatible - clocks - clock-names - phys - reg - vcc-supply unevaluatedProperties: false examples: - | #include <dt-bindings/clock/mt8183-clk.h> #include <dt-bindings/interrupt-controller/arm-gic.h> soc { #address-cells = <2>; #size-cells = <2>; ufs@ff3c0000 { compatible = "mediatek,mt8183-ufshci"; reg = <0 0x11270000 0 0x2300>; interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>; phys = <&ufsphy>; clocks = <&infracfg_ao CLK_INFRA_UFS>; clock-names = "ufs"; freq-table-hz = <0 0>; vcc-supply = <&mt_pmic_vemc_ldo_reg>; }; }; |