Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI J721e UFS Host Controller Glue Driver maintainers: - Vignesh Raghavendra <vigneshr@ti.com> properties: compatible: items: - const: ti,j721e-ufs reg: maxItems: 1 description: address of TI UFS glue registers clocks: maxItems: 1 description: phandle to the M-PHY clock power-domains: maxItems: 1 assigned-clocks: maxItems: 1 assigned-clock-parents: maxItems: 1 "#address-cells": const: 2 "#size-cells": const: 2 ranges: true required: - compatible - reg - clocks - power-domains patternProperties: "^ufs@[0-9a-f]+$": $ref: cdns,ufshc.yaml description: | Cadence UFS controller node must be the child node. unevaluatedProperties: false additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> bus { #address-cells = <2>; #size-cells = <2>; ufs-wrapper@4e80000 { compatible = "ti,j721e-ufs"; reg = <0x0 0x4e80000 0x0 0x100>; power-domains = <&k3_pds 277>; clocks = <&k3_clks 277 1>; assigned-clocks = <&k3_clks 277 1>; assigned-clock-parents = <&k3_clks 277 4>; ranges = <0x0 0x0 0x0 0x4e80000 0x0 0x14000>; #address-cells = <2>; #size-cells = <2>; ufs@4000 { compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0"; reg = <0x0 0x4000 0x0 0x10000>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; freq-table-hz = <19200000 19200000>; power-domains = <&k3_pds 277>; clocks = <&k3_clks 277 1>; assigned-clocks = <&k3_clks 277 1>; assigned-clock-parents = <&k3_clks 277 4>; clock-names = "core_clk"; }; }; }; |