Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 | # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8550 Peripheral Authentication Service maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> description: Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware on the Qualcomm DSP Hexagon cores. properties: compatible: enum: - qcom,sm8550-adsp-pas - qcom,sm8550-cdsp-pas - qcom,sm8550-mpss-pas - qcom,sm8650-adsp-pas - qcom,sm8650-cdsp-pas - qcom,sm8650-mpss-pas - qcom,x1e80100-adsp-pas - qcom,x1e80100-cdsp-pas reg: maxItems: 1 clocks: items: - description: XO clock clock-names: items: - const: xo qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. smd-edge: false firmware-name: $ref: /schemas/types.yaml#/definitions/string-array items: - description: Firmware name of the Hexagon core - description: Firmware name of the Hexagon Devicetree memory-region: minItems: 2 items: - description: Memory region for main Firmware authentication - description: Memory region for Devicetree Firmware authentication - description: DSM Memory region - description: DSM Memory region 2 - description: Memory region for Qlink Logging required: - compatible - reg - memory-region allOf: - $ref: /schemas/remoteproc/qcom,pas-common.yaml# - if: properties: compatible: enum: - qcom,sm8550-adsp-pas - qcom,sm8550-cdsp-pas - qcom,sm8650-adsp-pas - qcom,x1e80100-adsp-pas - qcom,x1e80100-cdsp-pas then: properties: interrupts: maxItems: 5 interrupt-names: maxItems: 5 memory-region: maxItems: 2 - if: properties: compatible: enum: - qcom,sm8650-cdsp-pas then: properties: interrupts: maxItems: 5 interrupt-names: maxItems: 5 memory-region: minItems: 3 maxItems: 3 - if: properties: compatible: enum: - qcom,sm8550-mpss-pas then: properties: interrupts: minItems: 6 interrupt-names: minItems: 6 memory-region: minItems: 3 maxItems: 3 - if: properties: compatible: enum: - qcom,sm8650-mpss-pas then: properties: interrupts: minItems: 6 interrupt-names: minItems: 6 memory-region: minItems: 5 maxItems: 5 - if: properties: compatible: enum: - qcom,sm8550-adsp-pas - qcom,sm8650-adsp-pas - qcom,x1e80100-adsp-pas then: properties: power-domains: items: - description: LCX power domain - description: LMX power domain power-domain-names: items: - const: lcx - const: lmx - if: properties: compatible: enum: - qcom,sm8550-mpss-pas - qcom,sm8650-mpss-pas then: properties: power-domains: items: - description: CX power domain - description: MSS power domain power-domain-names: items: - const: cx - const: mss - if: properties: compatible: enum: - qcom,sm8550-cdsp-pas - qcom,sm8650-cdsp-pas - qcom,x1e80100-cdsp-pas then: properties: power-domains: items: - description: CX power domain - description: MXC power domain - description: NSP power domain power-domain-names: items: - const: cx - const: mxc - const: nsp unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/mailbox/qcom-ipcc.h> remoteproc@30000000 { compatible = "qcom,sm8550-adsp-pas"; reg = <0x030000000 0x100>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; memory-region = <&adsp_mem>, <&dtb_adsp_mem>; firmware-name = "qcom/sm8550/adsp.mbn", "qcom/sm8550/adsp_dtb.mbn"; power-domains = <&rpmhpd_sm8550_lcx>, <&rpmhpd_sm8550_lmx>; power-domain-names = "lcx", "lmx"; qcom,qmp = <&aoss_qmp>; qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; glink-edge { interrupts-extended = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; label = "lpass"; qcom,remote-pid = <2>; /* ... */ }; }; |