Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP i.MX Co-Processor description: This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. maintainers: - Peng Fan <peng.fan@nxp.com> properties: compatible: enum: - fsl,imx6sx-cm4 - fsl,imx7d-cm4 - fsl,imx7ulp-cm4 - fsl,imx8mm-cm4 - fsl,imx8mn-cm7 - fsl,imx8mn-cm7-mmio - fsl,imx8mp-cm7 - fsl,imx8mp-cm7-mmio - fsl,imx8mq-cm4 - fsl,imx8qm-cm4 - fsl,imx8qxp-cm4 - fsl,imx8ulp-cm33 - fsl,imx93-cm33 clocks: maxItems: 1 syscon: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to syscon block which provide access to System Reset Controller mbox-names: items: - const: tx - const: rx - const: rxdb mboxes: description: This property is required only if the rpmsg/virtio functionality is used. List of <&phandle type channel> - 1 channel for TX, 1 channel for RX, 1 channel for RXDB. (see mailbox/fsl,mu.yaml) minItems: 1 maxItems: 3 memory-region: description: If present, a phandle for a reserved memory area that used for vdev buffer, resource table, vring region and others used by remote processor. minItems: 1 maxItems: 32 power-domains: minItems: 2 maxItems: 8 fsl,auto-boot: $ref: /schemas/types.yaml#/definitions/flag description: Indicate whether need to load the default firmware and start the remote processor automatically. fsl,entry-address: $ref: /schemas/types.yaml#/definitions/uint32 description: Specify CPU entry address for SCU enabled processor. fsl,iomuxc-gpr: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit. fsl,resource-id: $ref: /schemas/types.yaml#/definitions/uint32 description: This property is to specify the resource id of the remote processor in SoC which supports SCFW required: - compatible allOf: - if: properties: compatible: not: contains: enum: - fsl,imx8mn-cm7-mmio - fsl,imx8mp-cm7-mmio then: properties: fsl,iomuxc-gpr: false - if: properties: compatible: contains: enum: - fsl,imx8qxp-cm4 - fsl,imx8qm-cm4 then: required: - power-domains else: properties: power-domains: false additionalProperties: false examples: - | #include <dt-bindings/clock/imx7d-clock.h> m4_reserved_sysmem1: cm4@80000000 { reg = <0x80000000 0x80000>; }; m4_reserved_sysmem2: cm4@81000000 { reg = <0x81000000 0x80000>; }; imx7d-cm4 { compatible = "fsl,imx7d-cm4"; memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>; syscon = <&src>; clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>; }; - | #include <dt-bindings/clock/imx8mm-clock.h> imx8mm-cm4 { compatible = "fsl,imx8mm-cm4"; clocks = <&clk IMX8MM_CLK_M4_DIV>; mbox-names = "tx", "rx", "rxdb"; mboxes = <&mu 0 1 &mu 1 1 &mu 3 1>; memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>; syscon = <&src>; }; ... |