Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 | # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/remoteproc/qcom,sm8350-pas.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8350/SM8450 Peripheral Authentication Service maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> description: Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots firmware on the Qualcomm DSP Hexagon cores. properties: compatible: enum: - qcom,sm8350-adsp-pas - qcom,sm8350-cdsp-pas - qcom,sm8350-slpi-pas - qcom,sm8350-mpss-pas - qcom,sm8450-adsp-pas - qcom,sm8450-cdsp-pas - qcom,sm8450-mpss-pas - qcom,sm8450-slpi-pas reg: maxItems: 1 clocks: items: - description: XO clock clock-names: items: - const: xo qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. smd-edge: false memory-region: maxItems: 1 description: Reference to the reserved-memory for the Hexagon core firmware-name: maxItems: 1 description: Firmware name for the Hexagon core required: - compatible - reg - memory-region allOf: - $ref: /schemas/remoteproc/qcom,pas-common.yaml# - if: properties: compatible: enum: - qcom,sm8350-adsp-pas - qcom,sm8350-cdsp-pas - qcom,sm8350-slpi-pas - qcom,sm8450-adsp-pas - qcom,sm8450-cdsp-pas - qcom,sm8450-slpi-pas then: properties: interrupts: maxItems: 5 interrupt-names: maxItems: 5 else: properties: interrupts: minItems: 6 interrupt-names: minItems: 6 - if: properties: compatible: enum: - qcom,sm8350-mpss-pas - qcom,sm8450-mpss-pas then: properties: power-domains: items: - description: CX power domain - description: MSS power domain power-domain-names: items: - const: cx - const: mss - if: properties: compatible: enum: - qcom,sm8350-adsp-pas - qcom,sm8350-slpi-pas - qcom,sm8450-adsp-pas - qcom,sm8450-slpi-pas then: properties: power-domains: items: - description: LCX power domain - description: LMX power domain power-domain-names: items: - const: lcx - const: lmx - if: properties: compatible: enum: - qcom,sm8350-cdsp-pas - qcom,sm8450-cdsp-pas then: properties: power-domains: items: - description: CX power domain - description: MXC power domain power-domain-names: items: - const: cx - const: mxc unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/power/qcom,rpmhpd.h> remoteproc@30000000 { compatible = "qcom,sm8450-adsp-pas"; reg = <0x030000000 0x100>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; firmware-name = "qcom/sm8450/adsp.mbn"; interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; memory-region = <&adsp_mem>; power-domains = <&rpmhpd RPMHPD_LCX>, <&rpmhpd RPMHPD_LMX>; power-domain-names = "lcx", "lmx"; qcom,qmp = <&aoss_qmp>; qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; glink-edge { interrupts-extended = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; label = "lpass"; qcom,remote-pid = <2>; /* ... */ }; }; |