Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI SOC EHRPWM based PWM controller maintainers: - Vignesh R <vigneshr@ti.com> allOf: - $ref: pwm.yaml# properties: compatible: oneOf: - const: ti,am3352-ehrpwm - items: - enum: - ti,da850-ehrpwm - ti,am4372-ehrpwm - ti,dra746-ehrpwm - ti,am654-ehrpwm - ti,am64-epwm - const: ti,am3352-ehrpwm reg: maxItems: 1 "#pwm-cells": const: 3 description: | See pwm.yaml in this directory for a description of the cells format. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. clock-names: items: - const: tbclk - const: fck clocks: maxItems: 2 power-domains: maxItems: 1 required: - compatible - reg - clocks - clock-names additionalProperties: false examples: - | ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */ compatible = "ti,am3352-ehrpwm"; #pwm-cells = <3>; reg = <0x48300200 0x100>; clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; clock-names = "tbclk", "fck"; }; |