Documentation / devicetree / bindings / pwm / loongson,ls7a-pwm.yaml


Based on kernel version 6.16. Page generated on 2025-08-06 08:57 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Loongson PWM Controller

maintainers:
  - Binbin Zhou <zhoubinbin@loongson.cn>

description:
  The Loongson PWM has one pulse width output signal and one pulse input
  signal to be measured.
  It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.

allOf:
  - $ref: pwm.yaml#

properties:
  compatible:
    oneOf:
      - const: loongson,ls7a-pwm
      - items:
          - enum:
              - loongson,ls2k0500-pwm
              - loongson,ls2k1000-pwm
              - loongson,ls2k2000-pwm
          - const: loongson,ls7a-pwm

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1
 
  '#pwm-cells':
    description:
      The first cell must have a value of 0, which specifies the PWM output signal;
      The second cell is the period in nanoseconds;
      The third cell flag supported by this binding is PWM_POLARITY_INVERTED.
    const: 3

required:
  - compatible
  - reg
  - interrupts
  - clocks

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/loongson,ls2k-clk.h>
 
    pwm@1fe22000 {
        compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";
        reg = <0x1fe22000 0x10>;
        interrupt-parent = <&liointc0>;
        interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clk LOONGSON2_APB_CLK>;
        #pwm-cells = <3>;
    };