Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra PWFM controller maintainers: - Thierry Reding <thierry.reding@gmail.com> - Jon Hunter <jonathanh@nvidia.com> properties: compatible: oneOf: - enum: - nvidia,tegra20-pwm - nvidia,tegra186-pwm - items: - enum: - nvidia,tegra30-pwm - nvidia,tegra114-pwm - nvidia,tegra124-pwm - nvidia,tegra132-pwm - nvidia,tegra210-pwm - enum: - nvidia,tegra20-pwm - items: - const: nvidia,tegra194-pwm - const: nvidia,tegra186-pwm - items: - const: nvidia,tegra234-pwm - const: nvidia,tegra194-pwm reg: maxItems: 1 clocks: maxItems: 1 resets: items: - description: module reset reset-names: items: - const: pwm "#pwm-cells": const: 2 pinctrl-names: items: - const: default - const: sleep pinctrl-0: description: configuration for the default/active state pinctrl-1: description: configuration for the sleep state operating-points-v2: true power-domains: items: - description: phandle to the core power domain allOf: - $ref: pwm.yaml required: - compatible - reg - clocks - resets - reset-names additionalProperties: false examples: - | #include <dt-bindings/clock/tegra20-car.h> pwm: pwm@7000a000 { compatible = "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA20_CLK_PWM>; resets = <&tegra_car 17>; reset-names = "pwm"; }; |