Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iommu/verisilicon,iommu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Verisilicon IOMMU maintainers: - Benjamin Gaignard <benjamin.gaignard@collabora.com> description: |+ A Versilicon iommu translates io virtual addresses to physical addresses for its associated video decoder. properties: compatible: items: - const: rockchip,rk3588-av1-iommu - const: verisilicon,iommu-1.2 reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: Core clock - description: Interface clock clock-names: items: - const: core - const: iface "#iommu-cells": const: 0 power-domains: maxItems: 1 required: - compatible - reg - interrupts - clocks - clock-names - "#iommu-cells" additionalProperties: false examples: - | #include <dt-bindings/clock/rockchip,rk3588-cru.h> #include <dt-bindings/interrupt-controller/arm-gic.h> bus { #address-cells = <2>; #size-cells = <2>; iommu@fdca0000 { compatible = "rockchip,rk3588-av1-iommu","verisilicon,iommu-1.2"; reg = <0x0 0xfdca0000 0x0 0x600>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; clock-names = "core", "iface"; #iommu-cells = <0>; }; }; |