Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Technologies legacy IOMMU implementations maintainers: - Konrad Dybcio <konradybcio@kernel.org> description: | Qualcomm "B" family devices which are not compatible with arm-smmu have a similar looking IOMMU, but without access to the global register space and optionally requiring additional configuration to route context IRQs to non-secure vs secure interrupt line. properties: compatible: oneOf: - items: - enum: - qcom,msm8916-iommu - qcom,msm8953-iommu - const: qcom,msm-iommu-v1 - items: - enum: - qcom,msm8953-iommu - qcom,msm8976-iommu - const: qcom,msm-iommu-v2 clocks: items: - description: Clock required for IOMMU register group access - description: Clock required for underlying bus access clock-names: items: - const: iface - const: bus power-domains: maxItems: 1 reg: maxItems: 1 ranges: true qcom,iommu-secure-id: $ref: /schemas/types.yaml#/definitions/uint32 description: The SCM secure ID of the IOMMU instance. '#address-cells': const: 1 '#size-cells': const: 1 '#iommu-cells': const: 1 patternProperties: "^iommu-ctx@[0-9a-f]+$": type: object additionalProperties: false properties: compatible: enum: - qcom,msm-iommu-v1-ns - qcom,msm-iommu-v1-sec - qcom,msm-iommu-v2-ns - qcom,msm-iommu-v2-sec interrupts: maxItems: 1 reg: maxItems: 1 qcom,ctx-asid: $ref: /schemas/types.yaml#/definitions/uint32 description: The ASID number associated to the context bank. required: - compatible - interrupts - reg required: - compatible - clocks - clock-names - ranges - '#address-cells' - '#size-cells' - '#iommu-cells' additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-msm8916.h> #include <dt-bindings/interrupt-controller/arm-gic.h> apps_iommu: iommu@1e20000 { compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; reg = <0x01ef0000 0x3000>; clocks = <&gcc GCC_SMMU_CFG_CLK>, <&gcc GCC_APSS_TCU_CLK>; clock-names = "iface", "bus"; qcom,iommu-secure-id = <17>; #address-cells = <1>; #size-cells = <1>; #iommu-cells = <1>; ranges = <0 0x01e20000 0x40000>; /* mdp_0: */ iommu-ctx@4000 { compatible = "qcom,msm-iommu-v1-ns"; reg = <0x4000 0x1000>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; }; }; |