Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/iommu/apple,dart.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Apple DART IOMMU maintainers: - Sven Peter <sven@svenpeter.dev> description: |+ Apple SoCs may contain an implementation of their Device Address Resolution Table which provides a mandatory layer of address translations for various masters. Each DART instance is capable of handling up to 16 different streams with individual pagetables and page-level read/write protection flags. This DART IOMMU also raises interrupts in response to various fault conditions. properties: compatible: enum: - apple,t8103-dart - apple,t8103-usb4-dart - apple,t8110-dart - apple,t6000-dart reg: maxItems: 1 interrupts: maxItems: 1 clocks: description: Reference to the gate clock phandle if required for this IOMMU. Optional since not all IOMMUs are attached to a clock gate. '#iommu-cells': const: 1 description: Has to be one. The single cell describes the stream id emitted by a master to the IOMMU. power-domains: maxItems: 1 required: - compatible - reg - '#iommu-cells' - interrupts additionalProperties: false examples: - |+ dart1: iommu@82f80000 { compatible = "apple,t8103-dart"; reg = <0x82f80000 0x4000>; interrupts = <1 781 4>; #iommu-cells = <1>; }; master1 { iommus = <&dart1 0>; }; - |+ dart2a: iommu@82f00000 { compatible = "apple,t8103-dart"; reg = <0x82f00000 0x4000>; interrupts = <1 781 4>; #iommu-cells = <1>; }; dart2b: iommu@82f80000 { compatible = "apple,t8103-dart"; reg = <0x82f80000 0x4000>; interrupts = <1 781 4>; #iommu-cells = <1>; }; master2 { iommus = <&dart2a 0>, <&dart2b 1>; }; |