Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A10 Display Engine Backend maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> description: | The display engine backend exposes layers and sprites to the system. properties: compatible: enum: - allwinner,sun4i-a10-display-backend - allwinner,sun5i-a13-display-backend - allwinner,sun6i-a31-display-backend - allwinner,sun7i-a20-display-backend - allwinner,sun8i-a23-display-backend - allwinner,sun8i-a33-display-backend - allwinner,sun9i-a80-display-backend reg: minItems: 1 items: - description: Display Backend registers - description: SAT registers reg-names: minItems: 1 items: - const: be - const: sat interrupts: maxItems: 1 clocks: minItems: 3 items: - description: The backend interface clock - description: The backend module clock - description: The backend DRAM clock - description: The SAT clock clock-names: minItems: 3 items: - const: ahb - const: mod - const: ram - const: sat resets: minItems: 1 items: - description: The Backend reset line - description: The SAT reset line reset-names: minItems: 1 items: - const: be - const: sat # FIXME: This should be made required eventually once every SoC will # have the MBUS declared. interconnects: maxItems: 1 # FIXME: This should be made required eventually once every SoC will # have the MBUS declared. interconnect-names: const: dma-mem ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: Input endpoints of the controller. port@1: $ref: /schemas/graph.yaml#/properties/port description: Output endpoints of the controller. required: - port@0 - port@1 required: - compatible - reg - interrupts - clocks - clock-names - resets - ports additionalProperties: false if: properties: compatible: contains: const: allwinner,sun8i-a33-display-backend then: properties: reg: minItems: 2 reg-names: minItems: 2 clocks: minItems: 4 clock-names: minItems: 4 resets: minItems: 2 reset-names: minItems: 2 required: - reg-names - reset-names else: properties: reg: maxItems: 1 reg-names: maxItems: 1 clocks: maxItems: 3 clock-names: maxItems: 3 resets: maxItems: 1 reset-names: maxItems: 1 examples: - | /* * This comes from the clock/sun4i-a10-ccu.h and * reset/sun4i-a10-ccu.h headers, but we can't include them since * it would trigger a bunch of warnings for redefinitions of * symbols with the other example. */ #define CLK_AHB_DE_BE0 42 #define CLK_DRAM_DE_BE0 140 #define CLK_DE_BE0 144 #define RST_DE_BE0 5 display-backend@1e60000 { compatible = "allwinner,sun4i-a10-display-backend"; reg = <0x01e60000 0x10000>; interrupts = <47>; clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>, <&ccu CLK_DRAM_DE_BE0>; clock-names = "ahb", "mod", "ram"; resets = <&ccu RST_DE_BE0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; endpoint@0 { reg = <0>; remote-endpoint = <&fe0_out_be0>; }; endpoint@1 { reg = <1>; remote-endpoint = <&fe1_out_be0>; }; }; port@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; endpoint@0 { reg = <0>; remote-endpoint = <&tcon0_in_be0>; }; endpoint@1 { reg = <1>; remote-endpoint = <&tcon1_in_be0>; }; }; }; }; - | #include <dt-bindings/interrupt-controller/arm-gic.h> /* * This comes from the clock/sun8i-a23-a33-ccu.h and * reset/sun8i-a23-a33-ccu.h headers, but we can't include them * since it would trigger a bunch of warnings for redefinitions of * symbols with the other example. */ #define CLK_BUS_DE_BE 40 #define CLK_BUS_SAT 46 #define CLK_DRAM_DE_BE 84 #define CLK_DE_BE 85 #define RST_BUS_DE_BE 21 #define RST_BUS_SAT 27 display-backend@1e60000 { compatible = "allwinner,sun8i-a33-display-backend"; reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>; reg-names = "be", "sat"; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>, <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>; clock-names = "ahb", "mod", "ram", "sat"; resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>; reset-names = "be", "sat"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; endpoint { remote-endpoint = <&fe0_out_be0>; }; }; port@1 { reg = <1>; endpoint { remote-endpoint = <&drc0_in_be0>; }; }; }; }; ... |