Documentation / devicetree / bindings / watchdog / mpc8xxx-wdt.yaml


Based on kernel version 7.0. Page generated on 2026-04-23 09:49 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx)

maintainers:
  - J. Neuschäfer <j.ne@posteo.net>

properties:
  compatible:
    enum:
      - mpc83xx_wdt       # for an mpc83xx
      - fsl,mpc8610-wdt   # for an mpc86xx
      - fsl,mpc823-wdt    # for an mpc8xx

  device_type:
    const: watchdog

  reg:
    minItems: 1
    items:
      - description: |
          Base physical address and length of the area hosting the watchdog
          registers.
 
          On the 83xx, "Watchdog Timer Registers" area:     <0x200 0x100>
          On the 86xx, "Watchdog Timer Registers" area:     <0xe4000 0x100>
          On the 8xx, "General System Interface Unit" area: <0x0 0x10>

      - description: |
          Additional optional physical address and length (4) of location of
          the Reset Status Register (called RSTRSCR on the mpc86xx)
 
          On the 83xx, it is located at offset 0x910
          On the 86xx, it is located at offset 0xe0094
          On the 8xx, it is located at offset 0x288

required:
  - compatible
  - reg

allOf:
  - $ref: watchdog.yaml#

additionalProperties: false

examples:
  - |
    watchdog@0 {
        compatible = "fsl,mpc823-wdt";
        reg = <0x0 0x10 0x288 0x4>;
    };

  - |
    watchdog@200 {
        compatible = "mpc83xx_wdt";
        reg = <0x200 0x100>;
        device_type = "watchdog";
    };

...