Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM AMBA Primecell SP805 Watchdog maintainers: - Viresh Kumar <vireshk@kernel.org> description: |+ The Arm SP805 IP implements a watchdog device, which triggers an interrupt after a configurable time period. If that interrupt has not been serviced when the next interrupt would be triggered, the reset signal is asserted. allOf: - $ref: /schemas/watchdog/watchdog.yaml# # Need a custom select here or 'arm,primecell' will match on lots of nodes select: properties: compatible: contains: const: arm,sp805 required: - compatible properties: compatible: items: - const: arm,sp805 - const: arm,primecell interrupts: maxItems: 1 reg: maxItems: 1 clocks: description: | Clocks driving the watchdog timer hardware. The first clock is used for the actual watchdog counter. The second clock drives the register interface. maxItems: 2 clock-names: items: - const: wdog_clk - const: apb_pclk resets: maxItems: 1 description: WDOGRESn input reset signal for sp805 module. required: - compatible - reg - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> watchdog@66090000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x66090000 0x1000>; interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; clocks = <&wdt_clk>, <&apb_pclk>; clock-names = "wdog_clk", "apb_pclk"; resets = <&wdt_rst>; }; |