Based on kernel version 6.19. Page generated on 2026-02-12 08:38 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/watchdog/renesas,r9a09g057-wdt.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas RZ/V2H(P) Watchdog Timer (WDT) Controller maintainers: - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> properties: compatible: oneOf: - items: - enum: - renesas,r9a09g047-wdt # RZ/G3E - renesas,r9a09g056-wdt # RZ/V2N - const: renesas,r9a09g057-wdt # RZ/V2H(P) - items: - const: renesas,r9a09g087-wdt # RZ/N2H - const: renesas,r9a09g077-wdt # RZ/T2H - enum: - renesas,r9a09g057-wdt # RZ/V2H(P) - renesas,r9a09g077-wdt # RZ/T2H reg: minItems: 1 maxItems: 2 clocks: minItems: 1 items: - description: Register access clock - description: Main clock clock-names: minItems: 1 items: - const: pclk - const: oscclk power-domains: maxItems: 1 resets: maxItems: 1 timeout-sec: true required: - compatible - reg - clocks - clock-names - power-domains allOf: - $ref: watchdog.yaml# - if: properties: compatible: contains: const: renesas,r9a09g057-wdt then: properties: reg: maxItems: 1 clocks: minItems: 2 clock-names: minItems: 2 else: properties: clocks: maxItems: 1 clock-names: maxItems: 1 reg: minItems: 2 resets: false additionalProperties: false examples: - | #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> watchdog@11c00400 { compatible = "renesas,r9a09g057-wdt"; reg = <0x11c00400 0x400>; clocks = <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>; clock-names = "pclk", "oscclk"; resets = <&cpg 0x75>; power-domains = <&cpg>; }; |