Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale(NXP) IMX8/9 DDR performance monitor maintainers: - Frank Li <frank.li@nxp.com> properties: compatible: oneOf: - enum: - fsl,imx8-ddr-pmu - fsl,imx8dxl-db-pmu - fsl,imx8m-ddr-pmu - fsl,imx8mq-ddr-pmu - fsl,imx8mm-ddr-pmu - fsl,imx8mn-ddr-pmu - fsl,imx8mp-ddr-pmu - fsl,imx93-ddr-pmu - items: - enum: - fsl,imx8mm-ddr-pmu - fsl,imx8mn-ddr-pmu - fsl,imx8mq-ddr-pmu - fsl,imx8mp-ddr-pmu - const: fsl,imx8m-ddr-pmu - items: - enum: - fsl,imx8dxl-ddr-pmu - fsl,imx8qm-ddr-pmu - fsl,imx8qxp-ddr-pmu - const: fsl,imx8-ddr-pmu - items: - enum: - fsl,imx91-ddr-pmu - fsl,imx94-ddr-pmu - fsl,imx95-ddr-pmu - const: fsl,imx93-ddr-pmu reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 2 clock-names: items: - const: ipg - const: cnt required: - compatible - reg - interrupts additionalProperties: false allOf: - if: properties: compatible: contains: const: fsl,imx8dxl-db-pmu then: required: - clocks - clock-names else: properties: clocks: false clock-names: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> ddr-pmu@5c020000 { compatible = "fsl,imx8-ddr-pmu"; reg = <0x5c020000 0x10000>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; }; |