Based on kernel version 7.0. Page generated on 2026-04-23 09:48 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-vcp-mbox.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Video Companion Processor (VCP) mailbox maintainers: - Jjian Zhou <Jjian.Zhou@mediatek.com> description: The MTK VCP mailbox enables the SoC to communicate with the VCP by passing messages through 64 32-bit wide registers. It has 32 interrupt vectors in either direction for signalling purposes. properties: compatible: enum: - mediatek,mt8196-vcp-mbox reg: maxItems: 1 interrupts: maxItems: 1 "#mbox-cells": const: 0 required: - compatible - reg - interrupts - "#mbox-cells" additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> mailbox@31b80000 { compatible = "mediatek,mt8196-vcp-mbox"; reg = <0x31b80000 0x1000>; interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH 0>; #mbox-cells = <0>; }; |