Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller maintainers: - Conor Dooley <conor.dooley@microchip.com> properties: compatible: const: microchip,mpfs-mailbox reg: oneOf: - items: - description: mailbox control & data registers - description: mailbox interrupt registers deprecated: true - items: - description: mailbox control registers - description: mailbox interrupt registers - description: mailbox data registers interrupts: maxItems: 1 "#mbox-cells": const: 1 required: - compatible - reg - interrupts - "#mbox-cells" additionalProperties: false examples: - | soc { #address-cells = <2>; #size-cells = <2>; mbox: mailbox@37020000 { compatible = "microchip,mpfs-mailbox"; reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, <0x0 0x37020800 0x0 0x100>; interrupt-parent = <&L1>; interrupts = <96>; #mbox-cells = <1>; }; }; |