Documentation / devicetree / bindings / fpga / efinix,trion-config.yaml


Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/efinix,trion-config.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Efinix SPI FPGA Manager

maintainers:
  - Ian Dannapel <iansdannapel@gmail.com>

description: |
  Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams
  through "SPI Passive Mode".
  Additional pin hogs for bus width configuration should be set
  elsewhere, if necessary.
 
  References:
  - https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.3.pdf
  - https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.8.pdf
  - https://www.efinixinc.com/docs/an061-configuring-topaz-fpgas-v1.1.pdf

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - efinix,titanium-config
              - efinix,topaz-config
          - const: efinix,trion-config
      - const: efinix,trion-config

  spi-cpha: true

  spi-cpol: true

  spi-max-frequency:
    maximum: 25000000

  reg:
    maxItems: 1

  reset-gpios:
    description:
      reset and re-configuration trigger pin (low active)
    maxItems: 1

  cdone-gpios:
    description:
      optional configuration done status pin (high active)
    maxItems: 1

required:
  - compatible
  - reg
  - reset-gpios
  - spi-cpha
  - spi-cpol

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    spi {
      #address-cells = <1>;
      #size-cells = <0>;
      cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
      fpga-mgr@0 {
        compatible = "efinix,trion-config";
        reg = <0>;
        spi-max-frequency = <25000000>;
        spi-cpha;
        spi-cpol;
        reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
        cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
      };
    };
  - |
    #include <dt-bindings/gpio/gpio.h>
    spi {
      #address-cells = <1>;
      #size-cells = <0>;
      cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
      fpga-mgr@0 {
        compatible = "efinix,titanium-config", "efinix,trion-config";
        reg = <0>;
        spi-max-frequency = <25000000>;
        spi-cpha;
        spi-cpol;
        reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
        cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
      };
    };
...