Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
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| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga2sdram-bridge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera FPGA To SDRAM Bridge
maintainers:
- Xu Yilun <yilun.xu@intel.com>
allOf:
- $ref: fpga-bridge.yaml#
properties:
compatible:
const: altr,socfpga-fpga2sdram-bridge
reg:
maxItems: 1
required:
- compatible
unevaluatedProperties: false
examples:
- |
fpga-bridge@ffc25080 {
compatible = "altr,socfpga-fpga2sdram-bridge";
reg = <0xffc25080 0x4>;
bridge-enable = <0>;
};
|
- << [ bindings ]
- altera-socfpga-a10-fpga-mgr.txt
- altr,a10-pr-ip.yaml
- altr,fpga-passive-serial.yaml
- altr,freeze-bridge-controller.yaml
- altr,socfpga-fpga-mgr.yaml
- altr,socfpga-fpga2sdram-bridge.yaml
- altr,socfpga-hps2fpga-bridge.yaml
- efinix,trion-config.yaml
- fpga-bridge.yaml
- fpga-region.yaml
- intel,stratix10-soc-fpga-mgr.yaml
- lattice,ice40-fpga-mgr.yaml
- lattice,sysconfig.yaml
- lattice-machxo2-spi.txt
- microchip,mpf-spi-fpga-mgr.yaml
- technologic,ts7300-fpga.yaml
- xilinx-zynq-fpga-mgr.yaml
- xlnx,fpga-selectmap.yaml
- xlnx,fpga-slave-serial.yaml
- xlnx,pr-decoupler.yaml
- xlnx,versal-fpga.yaml
- xlnx,zynqmp-pcap-fpga.yaml
-
-