Documentation / devicetree / bindings / fpga / altr,freeze-bridge-controller.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Altera Freeze Bridge Controller

description:
  The Altera Freeze Bridge Controller manages one or more freeze bridges.
  The controller can freeze/disable the bridges which prevents signal
  changes from passing through the bridge. The controller can also
  unfreeze/enable the bridges which allows traffic to pass through the bridge
  normally.

maintainers:
  - Xu Yilun <yilun.xu@intel.com>

allOf:
  - $ref: fpga-bridge.yaml#

properties:
  compatible:
    const: altr,freeze-bridge-controller

  reg:
    maxItems: 1

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    fpga-bridge@100000450 {
        compatible = "altr,freeze-bridge-controller";
        reg = <0x1000 0x10>;
        bridge-enable = <0>;
    };