Based on kernel version 6.13
. Page generated on 2025-01-21 08:20 EST
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Altera Arria10 Partial Reconfiguration IP
Required properties:
- compatible : should contain "altr,a10-pr-ip"
- reg : base address and size for memory mapped io.
Example:
fpga_mgr: fpga-mgr@ff20c000 {
compatible = "altr,a10-pr-ip";
reg = <0xff20c000 0x10>;
};
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- << [ bindings ]
- altera-pr-ip.txt
- altera-socfpga-a10-fpga-mgr.txt
- altera-socfpga-fpga-mgr.txt
- altr,fpga-passive-serial.yaml
- altr,freeze-bridge-controller.yaml
- altr,socfpga-fpga2sdram-bridge.yaml
- altr,socfpga-hps2fpga-bridge.yaml
- fpga-bridge.yaml
- fpga-region.yaml
- intel-stratix10-soc-fpga-mgr.txt
- lattice,sysconfig.yaml
- lattice-ice40-fpga-mgr.txt
- lattice-machxo2-spi.txt
- microchip,mpf-spi-fpga-mgr.yaml
- xilinx-zynq-fpga-mgr.yaml
- xlnx,fpga-selectmap.yaml
- xlnx,fpga-slave-serial.yaml
- xlnx,pr-decoupler.yaml
- xlnx,versal-fpga.yaml
- xlnx,zynqmp-pcap-fpga.yaml
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