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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/ata/ti,da850-ahci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI DA850 AHCI SATA Controller maintainers: - Animesh Agarwal <animeshagarwal28@gmail.com> properties: compatible: const: ti,da850-ahci reg: items: - description: Address and size of the register map as defined by the AHCI 1.1 standard. - description: Address and size of Power Down Control Register (PWRDN) for enabling/disabling the SATA clock receiver. interrupts: maxItems: 1 required: - compatible - reg - interrupts additionalProperties: false examples: - | sata@218000 { compatible = "ti,da850-ahci"; reg = <0x218000 0x2000>, <0x22c018 0x4>; interrupts = <67>; }; |