Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/timer/renesas,cmt.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas Compare Match Timer (CMT) maintainers: - Geert Uytterhoeven <geert+renesas@glider.be> - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> description: The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock inputs and programmable compare match. Channels share hardware resources but their counter and compare match values are independent. A particular CMT instance can implement only a subset of the channels supported by the CMT model. Channel indices represent the hardware position of the channel in the CMT and don't match the channel numbers in the datasheets. properties: compatible: oneOf: - items: - enum: - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1 - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5 - renesas,sh73a0-cmt1 # 48-bit CMT1 on SH-Mobile AG5 - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5 - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5 - renesas,sh73a0-cmt4 # 32-bit CMT4 on SH-Mobile AG5 - items: - enum: - renesas,r8a73a4-cmt0 # 32-bit CMT0 on R-Mobile APE6 - renesas,r8a7742-cmt0 # 32-bit CMT0 on RZ/G1H - renesas,r8a7743-cmt0 # 32-bit CMT0 on RZ/G1M - renesas,r8a7744-cmt0 # 32-bit CMT0 on RZ/G1N - renesas,r8a7745-cmt0 # 32-bit CMT0 on RZ/G1E - renesas,r8a77470-cmt0 # 32-bit CMT0 on RZ/G1C - renesas,r8a7790-cmt0 # 32-bit CMT0 on R-Car H2 - renesas,r8a7791-cmt0 # 32-bit CMT0 on R-Car M2-W - renesas,r8a7792-cmt0 # 32-bit CMT0 on R-Car V2H - renesas,r8a7793-cmt0 # 32-bit CMT0 on R-Car M2-N - renesas,r8a7794-cmt0 # 32-bit CMT0 on R-Car E2 - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1 - items: - enum: - renesas,r8a73a4-cmt1 # 48-bit CMT1 on R-Mobile APE6 - renesas,r8a7742-cmt1 # 48-bit CMT1 on RZ/G1H - renesas,r8a7743-cmt1 # 48-bit CMT1 on RZ/G1M - renesas,r8a7744-cmt1 # 48-bit CMT1 on RZ/G1N - renesas,r8a7745-cmt1 # 48-bit CMT1 on RZ/G1E - renesas,r8a77470-cmt1 # 48-bit CMT1 on RZ/G1C - renesas,r8a7790-cmt1 # 48-bit CMT1 on R-Car H2 - renesas,r8a7791-cmt1 # 48-bit CMT1 on R-Car M2-W - renesas,r8a7792-cmt1 # 48-bit CMT1 on R-Car V2H - renesas,r8a7793-cmt1 # 48-bit CMT1 on R-Car M2-N - renesas,r8a7794-cmt1 # 48-bit CMT1 on R-Car E2 - const: renesas,rcar-gen2-cmt1 # 48-bit CMT1 on R-Mobile APE6, R-Car Gen2 and RZ/G1 - items: - enum: - renesas,r8a774a1-cmt0 # 32-bit CMT0 on RZ/G2M - renesas,r8a774b1-cmt0 # 32-bit CMT0 on RZ/G2N - renesas,r8a774c0-cmt0 # 32-bit CMT0 on RZ/G2E - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+ - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H - renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3 - renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3 - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2 - items: - enum: - renesas,r8a774a1-cmt1 # 48-bit CMT on RZ/G2M - renesas,r8a774b1-cmt1 # 48-bit CMT on RZ/G2N - renesas,r8a774c0-cmt1 # 48-bit CMT on RZ/G2E - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+ - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H - renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3 - renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3 - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2 - items: - enum: - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U - renesas,r8a779f0-cmt0 # 32-bit CMT0 on R-Car S4-8 - renesas,r8a779g0-cmt0 # 32-bit CMT0 on R-Car V4H - renesas,r8a779h0-cmt0 # 32-bit CMT0 on R-Car V4M - const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4 - items: - enum: - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U - renesas,r8a779f0-cmt1 # 48-bit CMT on R-Car S4-8 - renesas,r8a779g0-cmt1 # 48-bit CMT on R-Car V4H - renesas,r8a779h0-cmt1 # 48-bit CMT on R-Car V4M - const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4 reg: maxItems: 1 interrupts: minItems: 1 maxItems: 8 clocks: maxItems: 1 clock-names: const: fck power-domains: maxItems: 1 resets: maxItems: 1 required: - compatible - reg - interrupts - clocks - clock-names - power-domains allOf: - if: properties: compatible: contains: enum: - renesas,rcar-gen2-cmt0 - renesas,rcar-gen3-cmt0 - renesas,rcar-gen4-cmt0 then: properties: interrupts: minItems: 2 maxItems: 2 - if: properties: compatible: contains: enum: - renesas,rcar-gen2-cmt1 - renesas,rcar-gen3-cmt1 - renesas,rcar-gen4-cmt1 then: properties: interrupts: minItems: 8 maxItems: 8 additionalProperties: false examples: - | #include <dt-bindings/clock/r8a7790-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a7790-sysc.h> cmt0: timer@ffca0000 { compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0"; reg = <0xffca0000 0x1004>; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 124>; clock-names = "fck"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 124>; }; cmt1: timer@e6130000 { compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1"; reg = <0xe6130000 0x1004>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 329>; clock-names = "fck"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 329>; }; |