Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP i.MX8MN DISP blk-ctrl maintainers: - Lucas Stach <l.stach@pengutronix.de> description: The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to the NoC and ensuring proper power sequencing of the display and MIPI CSI peripherals located in the DISP domain of the SoC. properties: compatible: items: - const: fsl,imx8mn-disp-blk-ctrl - const: syscon reg: maxItems: 1 '#power-domain-cells': const: 1 power-domains: minItems: 5 maxItems: 5 power-domain-names: items: - const: bus - const: isi - const: lcdif - const: mipi-dsi - const: mipi-csi clocks: minItems: 11 maxItems: 11 clock-names: items: - const: disp_axi - const: disp_apb - const: disp_axi_root - const: disp_apb_root - const: lcdif-axi - const: lcdif-apb - const: lcdif-pix - const: dsi-pclk - const: dsi-ref - const: csi-aclk - const: csi-pclk required: - compatible - reg - power-domains - power-domain-names - clocks - clock-names additionalProperties: false examples: - | #include <dt-bindings/clock/imx8mn-clock.h> #include <dt-bindings/power/imx8mn-power.h> blk-ctrl@32e28000 { compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon"; reg = <0x32e28000 0x100>; power-domains = <&pgc_dispmix>, <&pgc_dispmix>, <&pgc_dispmix>, <&pgc_mipi>, <&pgc_mipi>; power-domain-names = "bus", "isi", "lcdif", "mipi-dsi", "mipi-csi"; clocks = <&clk IMX8MN_CLK_DISP_AXI>, <&clk IMX8MN_CLK_DISP_APB>, <&clk IMX8MN_CLK_DISP_AXI_ROOT>, <&clk IMX8MN_CLK_DISP_APB_ROOT>, <&clk IMX8MN_CLK_DISP_AXI_ROOT>, <&clk IMX8MN_CLK_DISP_APB_ROOT>, <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>, <&clk IMX8MN_CLK_DSI_CORE>, <&clk IMX8MN_CLK_DSI_PHY_REF>, <&clk IMX8MN_CLK_CSI1_PHY_REF>, <&clk IMX8MN_CLK_CAMERA_PIXEL_ROOT>; clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root", "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk", "dsi-ref", "csi-aclk", "csi-pclk"; #power-domain-cells = <1>; }; |