Based on kernel version 6.19. Page generated on 2026-02-12 08:38 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/power/mediatek,mt8196-gpufreq.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek MFlexGraphics Power and Frequency Controller maintainers: - Nicolas Frattaroli <nicolas.frattaroli@collabora.com> description: A special-purpose embedded MCU to control power and frequency of GPU devices using MediaTek Flexible Graphics integration hardware. properties: $nodename: pattern: '^power-controller@[a-f0-9]+$' compatible: enum: - mediatek,mt8196-gpufreq reg: items: - description: GPR memory area - description: RPC memory area - description: SoC variant ID register reg-names: items: - const: gpr - const: rpc - const: hw-revision clocks: items: - description: main clock of the embedded controller (EB) - description: core PLL - description: stack 0 PLL - description: stack 1 PLL clock-names: items: - const: eb - const: core - const: stack0 - const: stack1 mboxes: items: - description: FastDVFS events - description: frequency control - description: sleep control - description: timer control - description: frequency hopping control - description: hardware voter control - description: FastDVFS control mbox-names: items: - const: fast-dvfs-event - const: gpufreq - const: sleep - const: timer - const: fhctl - const: ccf - const: fast-dvfs memory-region: items: - description: phandle to the GPUEB shared memory "#clock-cells": const: 1 "#power-domain-cells": const: 0 required: - compatible - reg - reg-names - clocks - clock-names - mboxes - mbox-names - memory-region - "#clock-cells" - "#power-domain-cells" additionalProperties: false examples: - | #include <dt-bindings/clock/mediatek,mt8196-clock.h> power-controller@4b09fd00 { compatible = "mediatek,mt8196-gpufreq"; reg = <0x4b09fd00 0x80>, <0x4b800000 0x1000>, <0x4b860128 0x4>; reg-names = "gpr", "rpc", "hw-revision"; clocks = <&topckgen CLK_TOP_MFG_EB>, <&mfgpll CLK_MFG_AO_MFGPLL>, <&mfgpll_sc0 CLK_MFGSC0_AO_MFGPLL_SC0>, <&mfgpll_sc1 CLK_MFGSC1_AO_MFGPLL_SC1>; clock-names = "eb", "core", "stack0", "stack1"; mboxes = <&gpueb_mbox 0>, <&gpueb_mbox 1>, <&gpueb_mbox 2>, <&gpueb_mbox 3>, <&gpueb_mbox 4>, <&gpueb_mbox 5>, <&gpueb_mbox 7>; mbox-names = "fast-dvfs-event", "gpufreq", "sleep", "timer", "fhctl", "ccf", "fast-dvfs"; memory-region = <&gpueb_shared_memory>; #clock-cells = <1>; #power-domain-cells = <0>; }; |