Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale i.MX General Power Controller maintainers: - Philipp Zabel <p.zabel@pengutronix.de> description: | The i.MX6 General Power Control (GPC) block contains DVFS load tracking counters and Power Gating Control (PGC). The power domains are generic power domain providers as documented in Documentation/devicetree/bindings/power/power-domain.yaml. They are described as subnodes of the power gating controller 'pgc' node of the GPC. IP cores belonging to a power domain should contain a 'power-domains' property that is a phandle pointing to the power domain the device belongs to. properties: compatible: oneOf: - enum: - fsl,imx6q-gpc - items: - enum: - fsl,imx6qp-gpc - fsl,imx6sl-gpc - fsl,imx6sx-gpc - fsl,imx6ul-gpc - const: fsl,imx6q-gpc reg: maxItems: 1 interrupts: maxItems: 1 interrupt-controller: true '#interrupt-cells': const: 3 clocks: maxItems: 1 clock-names: const: ipg pgc: type: object additionalProperties: false description: list of power domains provided by this controller. properties: '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "power-domain@[0-9]$": type: object additionalProperties: false properties: '#power-domain-cells': const: 0 reg: description: | The following DOMAIN_INDEX values are valid for i.MX6Q: ARM_DOMAIN 0 PU_DOMAIN 1 The following additional DOMAIN_INDEX value is valid for i.MX6SL: DISPLAY_DOMAIN 2 The following additional DOMAIN_INDEX value is valid for i.MX6SX: PCI_DOMAIN 3 maxItems: 1 clocks: description: | A number of phandles to clocks that need to be enabled during domain power-up sequencing to ensure reset propagation into devices located inside this power domain. minItems: 1 maxItems: 7 power-supply: true required: - '#power-domain-cells' - reg required: - '#address-cells' - '#size-cells' required: - compatible - reg - interrupts - clocks - clock-names - pgc additionalProperties: false examples: - | #include <dt-bindings/clock/imx6qdl-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> gpc@20dc000 { compatible = "fsl,imx6q-gpc"; reg = <0x020dc000 0x4000>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_IPG>; clock-names = "ipg"; pgc { #address-cells = <1>; #size-cells = <0>; power-domain@0 { reg = <0>; #power-domain-cells = <0>; }; pd_pu: power-domain@1 { reg = <1>; #power-domain-cells = <0>; power-supply = <®_pu>; clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>, <&clks IMX6QDL_CLK_GPU2D_CORE>, <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_VPU_AXI>; }; }; }; |