Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550 maintainers: - Abel Vesa <abel.vesa@linaro.org> - Neil Armstrong <neil.armstrong@linaro.org> description: | RPMh interconnect providers support system bandwidth requirements through RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is able to communicate with the BCM through the Resource State Coordinator (RSC) associated with each execution environment. Provider nodes must point to at least one RPMh device child node pertaining to their RSC and each provider can map to multiple RPMh resources. See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h properties: compatible: enum: - qcom,sm8550-aggre1-noc - qcom,sm8550-aggre2-noc - qcom,sm8550-clk-virt - qcom,sm8550-cnoc-main - qcom,sm8550-config-noc - qcom,sm8550-gem-noc - qcom,sm8550-lpass-ag-noc - qcom,sm8550-lpass-lpiaon-noc - qcom,sm8550-lpass-lpicx-noc - qcom,sm8550-mc-virt - qcom,sm8550-mmss-noc - qcom,sm8550-nsp-noc - qcom,sm8550-pcie-anoc - qcom,sm8550-system-noc reg: maxItems: 1 clocks: minItems: 1 maxItems: 2 allOf: - $ref: qcom,rpmh-common.yaml# - if: properties: compatible: contains: enum: - qcom,sm8550-clk-virt - qcom,sm8550-mc-virt then: properties: reg: false else: required: - reg - if: properties: compatible: contains: enum: - qcom,sm8550-pcie-anoc then: properties: clocks: items: - description: aggre-NOC PCIe AXI clock - description: cfg-NOC PCIe a-NOC AHB clock - if: properties: compatible: contains: enum: - qcom,sm8550-aggre1-noc then: properties: clocks: items: - description: aggre UFS PHY AXI clock - description: aggre USB3 PRIM AXI clock - if: properties: compatible: contains: enum: - qcom,sm8550-aggre2-noc then: properties: clocks: items: - description: RPMH CC IPA clock - if: properties: compatible: contains: enum: - qcom,sm8550-aggre1-noc - qcom,sm8550-aggre2-noc - qcom,sm8550-pcie-anoc then: required: - clocks else: properties: clocks: false required: - compatible unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,sm8550-gcc.h> clk_virt: interconnect-0 { compatible = "qcom,sm8550-clk-virt"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; }; aggre1_noc: interconnect@16e0000 { compatible = "qcom,sm8550-aggre1-noc"; reg = <0x016e0000 0x14400>; #interconnect-cells = <2>; clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; qcom,bcm-voters = <&apps_bcm_voter>; }; |