Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Interconnect Bandwidth Monitor maintainers: - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> description: | Bandwidth Monitor measures current throughput on buses between various NoC fabrics and provides information when it crosses configured thresholds. Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845:: - Measuring the bandwidth between CPUs and Last Level Cache Controller - called just BWMON, - Measuring the bandwidth between Last Level Cache Controller and memory (DDR) - called LLCC BWMON. properties: compatible: oneOf: - const: qcom,msm8998-bwmon # BWMON v4 - items: - enum: - qcom,qcm2290-cpu-bwmon - qcom,sc7180-cpu-bwmon - qcom,sc7280-cpu-bwmon - qcom,sc8280xp-cpu-bwmon - qcom,sdm845-cpu-bwmon - qcom,sm6115-cpu-bwmon - qcom,sm6350-llcc-bwmon - qcom,sm8250-cpu-bwmon - qcom,sm8550-cpu-bwmon - qcom,sm8650-cpu-bwmon - qcom,x1e80100-cpu-bwmon - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: - qcom,sc7180-llcc-bwmon - qcom,sc8280xp-llcc-bwmon - qcom,sm6350-cpu-bwmon - qcom,sm8250-llcc-bwmon - qcom,sm8550-llcc-bwmon - qcom,sm8650-llcc-bwmon - qcom,x1e80100-llcc-bwmon - const: qcom,sc7280-llcc-bwmon - const: qcom,sc7280-llcc-bwmon # BWMON v5 - const: qcom,sdm845-llcc-bwmon # BWMON v5 interconnects: maxItems: 1 interrupts: maxItems: 1 operating-points-v2: true opp-table: type: object reg: # BWMON v5 uses one register address space, v1-v4 use one or two. minItems: 1 maxItems: 2 reg-names: minItems: 1 maxItems: 2 required: - compatible - interconnects - interrupts - operating-points-v2 - reg additionalProperties: false allOf: - if: properties: compatible: const: qcom,msm8998-bwmon then: properties: reg: minItems: 2 reg-names: items: - const: monitor - const: global else: properties: reg: maxItems: 1 reg-names: maxItems: 1 examples: - | #include <dt-bindings/interconnect/qcom,sdm845.h> #include <dt-bindings/interrupt-controller/arm-gic.h> pmu@1436400 { compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon"; reg = <0x01436400 0x600>; interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>; operating-points-v2 = <&cpu_bwmon_opp_table>; cpu_bwmon_opp_table: opp-table { compatible = "operating-points-v2"; opp-0 { opp-peak-kBps = <4800000>; }; opp-1 { opp-peak-kBps = <9216000>; }; opp-2 { opp-peak-kBps = <15052800>; }; opp-3 { opp-peak-kBps = <20889600>; }; opp-4 { opp-peak-kBps = <25497600>; }; }; }; |