Based on kernel version 6.18. Page generated on 2025-12-02 09:03 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/edac/apm,xgene-edac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: APM X-Gene SoC EDAC maintainers: - Khuong Dinh <khuong@os.amperecomputing.com> description: > EDAC node is defined to describe on-chip error detection and correction. The following error types are supported: memory controller - Memory controller PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache L3 - L3 cache controller SoC - SoC IPs such as Ethernet, SATA, etc properties: compatible: const: apm,xgene-edac reg: items: - description: CPU bus (PCP) resource '#address-cells': const: 2 '#size-cells': const: 2 ranges: true interrupts: description: Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s). items: - description: MCU error IRQ - description: PMD error IRQ - description: L3 error IRQ - description: SoC error IRQ minItems: 1 regmap-csw: description: Regmap of the CPU switch fabric (CSW) resource. $ref: /schemas/types.yaml#/definitions/phandle regmap-mcba: description: Regmap of the MCB-A (memory bridge) resource. $ref: /schemas/types.yaml#/definitions/phandle regmap-mcbb: description: Regmap of the MCB-B (memory bridge) resource. $ref: /schemas/types.yaml#/definitions/phandle regmap-efuse: description: Regmap of the PMD efuse resource. $ref: /schemas/types.yaml#/definitions/phandle regmap-rb: description: Regmap of the register bus resource (optional for compatibility). $ref: /schemas/types.yaml#/definitions/phandle required: - compatible - regmap-csw - regmap-mcba - regmap-mcbb - regmap-efuse - reg - interrupts # Child-node bindings patternProperties: '^edacmc@': description: Memory controller subnode type: object additionalProperties: false properties: compatible: const: apm,xgene-edac-mc reg: maxItems: 1 memory-controller: description: Instance number of the memory controller. $ref: /schemas/types.yaml#/definitions/uint32 maximum: 3 required: - compatible - reg - memory-controller '^edacpmd@': description: PMD subnode type: object additionalProperties: false properties: compatible: const: apm,xgene-edac-pmd reg: maxItems: 1 pmd-controller: description: Instance number of the PMD controller. $ref: /schemas/types.yaml#/definitions/uint32 maximum: 3 required: - compatible - reg - pmd-controller '^edacl3@': description: L3 subnode type: object additionalProperties: false properties: compatible: enum: - apm,xgene-edac-l3 - apm,xgene-edac-l3-v2 reg: maxItems: 1 required: - compatible - reg '^edacsoc@': description: SoC subnode type: object additionalProperties: false properties: compatible: enum: - apm,xgene-edac-soc - apm,xgene-edac-soc-v1 reg: maxItems: 1 required: - compatible - reg additionalProperties: false examples: - | bus { #address-cells = <2>; #size-cells = <2>; edac@78800000 { compatible = "apm,xgene-edac"; reg = <0x0 0x78800000 0x0 0x100>; #address-cells = <2>; #size-cells = <2>; ranges; interrupts = <0x0 0x20 0x4>, <0x0 0x21 0x4>, <0x0 0x27 0x4>; regmap-csw = <&csw>; regmap-mcba = <&mcba>; regmap-mcbb = <&mcbb>; regmap-efuse = <&efuse>; regmap-rb = <&rb>; edacmc@7e800000 { compatible = "apm,xgene-edac-mc"; reg = <0x0 0x7e800000 0x0 0x1000>; memory-controller = <0>; }; edacpmd@7c000000 { compatible = "apm,xgene-edac-pmd"; reg = <0x0 0x7c000000 0x0 0x200000>; pmd-controller = <0>; }; edacl3@7e600000 { compatible = "apm,xgene-edac-l3"; reg = <0x0 0x7e600000 0x0 0x1000>; }; edacsoc@7e930000 { compatible = "apm,xgene-edac-soc-v1"; reg = <0x0 0x7e930000 0x0 0x1000>; }; }; }; |