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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/edac/dmc-520.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM DMC-520 EDAC maintainers: - Lei Wang <lewan@microsoft.com> description: |+ DMC-520 node is defined to describe DRAM error detection and correction. https://static.docs.arm.com/100000/0200/corelink_dmc520_trm_100000_0200_01_en.pdf properties: compatible: items: - const: brcm,dmc-520 - const: arm,dmc-520 reg: maxItems: 1 interrupts: minItems: 1 maxItems: 10 interrupt-names: minItems: 1 maxItems: 10 items: enum: - ram_ecc_errc - ram_ecc_errd - dram_ecc_errc - dram_ecc_errd - failed_access - failed_prog - link_err - temperature_event - arch_fsm - phy_request required: - compatible - reg - interrupts - interrupt-names additionalProperties: false examples: - | dmc0: dmc@200000 { compatible = "brcm,dmc-520", "arm,dmc-520"; reg = <0x200000 0x80000>; interrupts = <0x0 0x349 0x4>, <0x0 0x34B 0x4>; interrupt-names = "dram_ecc_errc", "dram_ecc_errd"; }; |