Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 | %YAML 1.2 --- $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas Bus State Controller (BSC) maintainers: - Geert Uytterhoeven <geert+renesas@glider.be> description: | The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus Bridge", or "External Bus Interface") can be found in several Renesas ARM SoCs. It provides an external bus for connecting multiple external devices to the SoC, driving several chip select lines, for e.g. NOR FLASH, Ethernet and USB. While the BSC is a fairly simple memory-mapped bus, it may be part of a PM domain, and may have a gateable functional clock. Before a device connected to the BSC can be accessed, the PM domain containing the BSC must be powered on, and the functional clock driving the BSC must be enabled. The bindings for the BSC extend the bindings for "simple-pm-bus". allOf: - $ref: simple-pm-bus.yaml# properties: compatible: items: - enum: - renesas,bsc-r8a73a4 # R-Mobile APE6 (r8a73a4) - renesas,bsc-sh73a0 # SH-Mobile AG5 (sh73a0) - const: renesas,bsc - {} # simple-pm-bus, but not listed here to avoid false select reg: maxItems: 1 interrupts: maxItems: 1 required: - reg unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> bsc: bus@fec10000 { compatible = "renesas,bsc-sh73a0", "renesas,bsc", "simple-pm-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x20000000>; reg = <0xfec10000 0x400>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zb_clk>; power-domains = <&pd_a4s>; }; |