Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 | # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Temperature Sensor ADC (TSADC) on Rockchip SoCs maintainers: - Heiko Stuebner <heiko@sntech.de> $ref: thermal-sensor.yaml# properties: compatible: enum: - rockchip,px30-tsadc - rockchip,rk3228-tsadc - rockchip,rk3288-tsadc - rockchip,rk3328-tsadc - rockchip,rk3368-tsadc - rockchip,rk3399-tsadc - rockchip,rk3568-tsadc - rockchip,rk3588-tsadc - rockchip,rv1108-tsadc reg: maxItems: 1 interrupts: maxItems: 1 clocks: minItems: 2 maxItems: 2 clock-names: items: - const: tsadc - const: apb_pclk resets: minItems: 1 maxItems: 3 reset-names: minItems: 1 items: - const: tsadc-apb - const: tsadc - const: tsadc-phy "#thermal-sensor-cells": const: 1 rockchip,grf: description: The phandle of the syscon node for the general register file. $ref: /schemas/types.yaml#/definitions/phandle rockchip,hw-tshut-temp: description: The hardware-controlled shutdown temperature value. $ref: /schemas/types.yaml#/definitions/uint32 rockchip,hw-tshut-mode: description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1] rockchip,hw-tshut-polarity: description: The hardware-controlled active polarity 0:LOW 1:HIGH. $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1] required: - compatible - reg - interrupts - clocks - clock-names - resets unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/rk3288-cru.h> tsadc: tsadc@ff280000 { compatible = "rockchip,rk3288-tsadc"; reg = <0xff280000 0x100>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>; rockchip,hw-tshut-polarity = <0>; }; |