Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm QPNP PMIC Temperature Alarm maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> description: QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips that utilize the Qualcomm SPMI implementation. These peripherals provide an interrupt signal and status register to identify high PMIC die temperature. allOf: - $ref: thermal-sensor.yaml# properties: compatible: const: qcom,spmi-temp-alarm reg: maxItems: 1 interrupts: maxItems: 1 io-channels: items: - description: ADC channel, which reports chip die temperature io-channel-names: items: - const: thermal '#thermal-sensor-cells': const: 0 required: - compatible - reg - interrupts additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> pmic { #address-cells = <1>; #size-cells = <0>; pm8350_temp_alarm: temperature-sensor@a00 { compatible = "qcom,spmi-temp-alarm"; reg = <0xa00>; interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; #thermal-sensor-cells = <0>; }; }; thermal-zones { pm8350_thermal: pm8350c-thermal { polling-delay-passive = <100>; polling-delay = <0>; thermal-sensors = <&pm8350_temp_alarm>; trips { pm8350_trip0: trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; pm8350_crit: pm8350c-crit { temperature = <115000>; hysteresis = <0>; type = "critical"; }; }; }; }; |