Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright (C) 2022, Intel Corporation %YAML 1.2 --- $id: http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Intel HPS Copy Engine maintainers: - Matthew Gerlach <matthew.gerlach@linux.intel.com> description: | The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy a bootable image from host memory to HPS DDR. Additionally, there is a register the HPS can use to indicate the state of booting the copied image as well as a keep-a-live indication to the host. properties: compatible: const: intel,hps-copy-engine '#dma-cells': const: 1 reg: maxItems: 1 required: - compatible - reg additionalProperties: false examples: - | bus@80000000 { compatible = "simple-bus"; reg = <0x80000000 0x60000000>, <0xf9000000 0x00100000>; reg-names = "axi_h2f", "axi_h2f_lw"; #address-cells = <2>; #size-cells = <1>; ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>; dma-controller@0 { compatible = "intel,hps-copy-engine"; reg = <0x00000000 0x00000000 0x00001000>; #dma-cells = <1>; }; }; |