Based on kernel version 6.15
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip internal OTP (One Time Programmable) memory maintainers: - Heiko Stuebner <heiko@sntech.de> properties: compatible: enum: - rockchip,px30-otp - rockchip,rk3308-otp - rockchip,rk3576-otp - rockchip,rk3588-otp reg: maxItems: 1 clocks: minItems: 3 maxItems: 4 clock-names: minItems: 3 items: - const: otp - const: apb_pclk - const: phy - const: arb resets: minItems: 1 maxItems: 3 reset-names: minItems: 1 maxItems: 3 required: - compatible - reg - clocks - clock-names - resets - reset-names allOf: - $ref: nvmem.yaml# - $ref: nvmem-deprecated-cells.yaml# - if: properties: compatible: contains: enum: - rockchip,px30-otp - rockchip,rk3308-otp then: properties: clocks: maxItems: 3 clock-names: maxItems: 3 resets: maxItems: 1 reset-names: items: - const: phy - if: properties: compatible: contains: enum: - rockchip,rk3576-otp then: properties: clocks: maxItems: 3 clock-names: maxItems: 3 resets: minItems: 2 maxItems: 2 reset-names: items: - const: otp - const: apb - if: properties: compatible: contains: enum: - rockchip,rk3588-otp then: properties: clocks: minItems: 4 clock-names: minItems: 4 resets: minItems: 3 reset-names: items: - const: otp - const: apb - const: arb unevaluatedProperties: false examples: - | #include <dt-bindings/clock/px30-cru.h> soc { #address-cells = <2>; #size-cells = <2>; otp: efuse@ff290000 { compatible = "rockchip,px30-otp"; reg = <0x0 0xff290000 0x0 0x4000>; clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, <&cru PCLK_OTP_PHY>; clock-names = "otp", "apb_pclk", "phy"; resets = <&cru SRST_OTP_PHY>; reset-names = "phy"; #address-cells = <1>; #size-cells = <1>; cpu_id: id@7 { reg = <0x07 0x10>; }; cpu_leakage: cpu-leakage@17 { reg = <0x17 0x1>; }; performance: performance@1e { reg = <0x1e 0x1>; bits = <4 3>; }; }; }; |