Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 | # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip KSZ Series Ethernet switches maintainers: - Marek Vasut <marex@denx.de> - Woojung Huh <Woojung.Huh@microchip.com> allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# properties: # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional # required and optional properties. compatible: enum: - microchip,ksz8765 - microchip,ksz8794 - microchip,ksz8795 - microchip,ksz8863 - microchip,ksz8873 - microchip,ksz9477 - microchip,ksz9897 - microchip,ksz9896 - microchip,ksz9567 - microchip,ksz8565 - microchip,ksz9893 - microchip,ksz9563 - microchip,ksz8563 - microchip,ksz8567 reset-gpios: description: Should be a gpio specifier for a reset line. maxItems: 1 wakeup-source: true microchip,synclko-125: $ref: /schemas/types.yaml#/definitions/flag description: Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz. microchip,synclko-disable: $ref: /schemas/types.yaml#/definitions/flag description: Set if the output SYNCLKO clock should be disabled. Do not mix with microchip,synclko-125. microchip,io-drive-strength-microamp: description: IO Pad Drive Strength enum: [8000, 16000] default: 16000 microchip,hi-drive-strength-microamp: description: High Speed Drive Strength. Controls drive strength of GMII / RGMII / MII / RMII (except TX_CLK/REFCLKI, COL and CRS) and CLKO_25_125 lines. enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000] default: 24000 microchip,lo-drive-strength-microamp: description: Low Speed Drive Strength. Controls drive strength of TX_CLK / REFCLKI, COL, CRS, LEDs, PME_N, NTRP_N, SDO and SDI/SDA/MDIO lines. enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000] default: 8000 interrupts: maxItems: 1 required: - compatible - reg if: not: properties: compatible: enum: - microchip,ksz8863 - microchip,ksz8873 then: $ref: dsa.yaml#/$defs/ethernet-ports else: patternProperties: "^(ethernet-)?ports$": patternProperties: "^(ethernet-)?port@[0-2]$": $ref: dsa-port.yaml# unevaluatedProperties: false properties: microchip,rmii-clk-internal: $ref: /schemas/types.yaml#/definitions/flag description: When ksz88x3 is acting as clock provier (via REFCLKO) it can select between internal and external RMII reference clock. Internal reference clock means that the clock for the RMII of ksz88x3 is provided by the ksz88x3 internally and the REFCLKI pin is unconnected. For the external reference clock, the clock needs to be fed back to ksz88x3 via REFCLKI. If microchip,rmii-clk-internal is set, ksz88x3 will provide rmii reference clock internally, otherwise reference clock should be provided externally. dependencies: microchip,rmii-clk-internal: [ethernet] unevaluatedProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> // Ethernet switch connected via SPI to the host, CPU port wired to eth0: eth0 { fixed-link { speed = <1000>; full-duplex; }; }; spi { #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&pinctrl_spi_ksz>; cs-gpios = <&pioC 25 0>; id = <1>; ksz9477: switch@0 { compatible = "microchip,ksz9477"; reg = <0>; reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; spi-max-frequency = <44000000>; ethernet-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "lan1"; }; port@1 { reg = <1>; label = "lan2"; }; port@2 { reg = <2>; label = "lan3"; }; port@3 { reg = <3>; label = "lan4"; }; port@4 { reg = <4>; label = "lan5"; }; port@5 { reg = <5>; ethernet = <ð0>; phy-mode = "rgmii"; fixed-link { speed = <1000>; full-duplex; }; }; }; }; ksz8565: switch@1 { compatible = "microchip,ksz8565"; reg = <1>; spi-max-frequency = <44000000>; ethernet-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "lan1"; }; port@1 { reg = <1>; label = "lan2"; }; port@2 { reg = <2>; label = "lan3"; }; port@3 { reg = <3>; label = "lan4"; }; port@6 { reg = <6>; ethernet = <ð0>; phy-mode = "rgmii"; fixed-link { speed = <1000>; full-duplex; }; }; }; }; }; ... |