Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/cache/starfive,jh8100-starlink-cache.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: StarFive StarLink Cache Controller maintainers: - Joshua Yeong <joshua.yeong@starfivetech.com> description: StarFive's StarLink Cache Controller manages the L3 cache shared between clusters of CPU cores. The cache driver enables RISC-V non-standard cache management as an alternative to instructions in the RISC-V Zicbom extension. allOf: - $ref: /schemas/cache-controller.yaml# # We need a select here so we don't match all nodes with 'cache' select: properties: compatible: contains: enum: - starfive,jh8100-starlink-cache required: - compatible properties: compatible: items: - const: starfive,jh8100-starlink-cache - const: cache reg: maxItems: 1 unevaluatedProperties: false required: - compatible - reg - cache-block-size - cache-level - cache-sets - cache-size - cache-unified examples: - | soc { #address-cells = <2>; #size-cells = <2>; cache-controller@15000000 { compatible = "starfive,jh8100-starlink-cache", "cache"; reg = <0x0 0x15000000 0x0 0x278>; cache-block-size = <64>; cache-level = <3>; cache-sets = <8192>; cache-size = <0x400000>; cache-unified; }; }; |