Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Generic SYSCON mapped register reset driver maintainers: - Sebastian Reichel <sre@kernel.org> description: |+ This is a generic reset driver using syscon to map the reset register. The reset is generally performed with a write to the reset register defined by the SYSCON register map base plus the offset with the value and mask defined in the reboot node. Default will be little endian mode, 32 bit access only. The SYSCON registers map is normally retrieved from the parental dt-node. So the SYSCON reboot node should be represented as a sub-node of a "syscon", "simple-mfd" node. Though the regmap property pointing to the system controller node is also supported. properties: compatible: const: syscon-reboot mask: $ref: /schemas/types.yaml#/definitions/uint32 description: Update only the register bits defined by the mask (32 bit). offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset in the register map for the reboot register (in bytes). regmap: $ref: /schemas/types.yaml#/definitions/phandle deprecated: true description: | Phandle to the register map node. This property is deprecated in favor of the syscon-reboot node been a child of a system controller node. value: $ref: /schemas/types.yaml#/definitions/uint32 description: The reset value written to the reboot register (32 bit access). priority: default: 192 required: - compatible - offset additionalProperties: false allOf: - $ref: restart-handler.yaml# - if: not: required: - mask then: required: - value examples: - | reboot { compatible = "syscon-reboot"; regmap = <®mapnode>; offset = <0x0>; mask = <0x1>; }; |