Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek SGMIISYS Controller maintainers: - Matthias Brugger <matthias.bgg@gmail.com> description: The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks to the ethernet subsystem to which it is attached. properties: compatible: oneOf: - items: - enum: - mediatek,mt7622-sgmiisys - mediatek,mt7629-sgmiisys - mediatek,mt7981-sgmiisys_0 - mediatek,mt7981-sgmiisys_1 - mediatek,mt7986-sgmiisys_0 - mediatek,mt7986-sgmiisys_1 - const: syscon - items: - enum: - mediatek,mt7988-sgmiisys0 - mediatek,mt7988-sgmiisys1 - const: simple-mfd - const: syscon reg: maxItems: 1 '#clock-cells': const: 1 mediatek,pnswap: description: Invert polarity of the SGMII data lanes type: boolean pcs: type: object description: MediaTek LynxI HSGMII PCS properties: compatible: const: mediatek,mt7988-sgmii clocks: maxItems: 3 clock-names: items: - const: sgmii_sel - const: sgmii_tx - const: sgmii_rx required: - compatible - clocks - clock-names additionalProperties: false required: - compatible - reg - '#clock-cells' allOf: - if: properties: compatible: contains: enum: - mediatek,mt7988-sgmiisys0 - mediatek,mt7988-sgmiisys1 then: required: - pcs else: properties: pcs: false additionalProperties: false examples: - | soc { #address-cells = <2>; #size-cells = <2>; sgmiisys: syscon@1b128000 { compatible = "mediatek,mt7622-sgmiisys", "syscon"; reg = <0 0x1b128000 0 0x1000>; #clock-cells = <1>; }; }; |