Based on kernel version 6.13
. Page generated on 2025-01-21 08:20 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: LPDDR3 SDRAM AC timing parameters for a given speed-bin maintainers: - Krzysztof Kozlowski <krzk@kernel.org> properties: compatible: const: jedec,lpddr3-timings reg: maxItems: 1 description: | Maximum DDR clock frequency for the speed-bin, in Hz. Property is deprecated, use max-freq. deprecated: true max-freq: $ref: /schemas/types.yaml#/definitions/uint32 description: | Maximum DDR clock frequency for the speed-bin, in Hz. min-freq: $ref: /schemas/types.yaml#/definitions/uint32 description: | Minimum DDR clock frequency for the speed-bin, in Hz. tCKE: $ref: /schemas/types.yaml#/definitions/uint32 description: | CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds. tCKESR: $ref: /schemas/types.yaml#/definitions/uint32 description: | CKE minimum pulse width during SELF REFRESH (low pulse width during SELF REFRESH) in pico seconds. tFAW: $ref: /schemas/types.yaml#/definitions/uint32 description: | Four-bank activate window in pico seconds. tMRD: $ref: /schemas/types.yaml#/definitions/uint32 description: | Mode register set command delay in pico seconds. tR2R-C2C: $ref: /schemas/types.yaml#/definitions/uint32 description: | Additional READ-to-READ delay in chip-to-chip cases in pico seconds. tRAS: $ref: /schemas/types.yaml#/definitions/uint32 description: | Row active time in pico seconds. tRC: $ref: /schemas/types.yaml#/definitions/uint32 description: | ACTIVATE-to-ACTIVATE command period in pico seconds. tRCD: $ref: /schemas/types.yaml#/definitions/uint32 description: | RAS-to-CAS delay in pico seconds. tRFC: $ref: /schemas/types.yaml#/definitions/uint32 description: | Refresh Cycle time in pico seconds. tRPab: $ref: /schemas/types.yaml#/definitions/uint32 description: | Row precharge time (all banks) in pico seconds. tRPpb: $ref: /schemas/types.yaml#/definitions/uint32 description: | Row precharge time (single banks) in pico seconds. tRRD: $ref: /schemas/types.yaml#/definitions/uint32 description: | Active bank A to active bank B in pico seconds. tRTP: $ref: /schemas/types.yaml#/definitions/uint32 description: | Internal READ to PRECHARGE command delay in pico seconds. tW2W-C2C: $ref: /schemas/types.yaml#/definitions/uint32 description: | Additional WRITE-to-WRITE delay in chip-to-chip cases in pico seconds. tWR: $ref: /schemas/types.yaml#/definitions/uint32 description: | WRITE recovery time in pico seconds. tWTR: $ref: /schemas/types.yaml#/definitions/uint32 description: | Internal WRITE-to-READ command delay in pico seconds. tXP: $ref: /schemas/types.yaml#/definitions/uint32 description: | Exit power-down to next valid command delay in pico seconds. tXSR: $ref: /schemas/types.yaml#/definitions/uint32 description: | SELF REFRESH exit to next valid command delay in pico seconds. required: - compatible - min-freq - max-freq additionalProperties: false examples: - | lpddr3 { timings { compatible = "jedec,lpddr3-timings"; max-freq = <800000000>; min-freq = <100000000>; tCKE = <3750>; tCKESR = <3750>; tFAW = <25000>; tMRD = <7000>; tR2R-C2C = <0>; tRAS = <23000>; tRC = <33750>; tRCD = <10000>; tRFC = <65000>; tRPab = <12000>; tRPpb = <12000>; tRRD = <6000>; tRTP = <3750>; tW2W-C2C = <0>; tWR = <7500>; tWTR = <3750>; tXP = <3750>; tXSR = <70000>; }; }; |