Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (c) 2023 Imagination Technologies Ltd. %YAML 1.2 --- $id: http://devicetree.org/schemas/gpu/img,powervr-rogue.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Imagination Technologies PowerVR and IMG Rogue GPUs maintainers: - Frank Binns <frank.binns@imgtec.com> properties: compatible: items: - enum: - ti,am62-gpu - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable reg: maxItems: 1 clocks: minItems: 1 maxItems: 3 clock-names: items: - const: core - const: mem - const: sys minItems: 1 interrupts: maxItems: 1 power-domains: maxItems: 1 required: - compatible - reg - clocks - clock-names - interrupts additionalProperties: false allOf: - if: properties: compatible: contains: const: ti,am62-gpu then: properties: clocks: maxItems: 1 examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/ti,sci_pm_domain.h> gpu@fd00000 { compatible = "ti,am62-gpu", "img,img-axe"; reg = <0x0fd00000 0x20000>; clocks = <&k3_clks 187 0>; clock-names = "core"; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; }; |