Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra234 NVDEC description: | NVDEC is the hardware video decoder present on NVIDIA Tegra210 and newer chips. It is located on the Host1x bus and typically programmed through Host1x channels. maintainers: - Thierry Reding <treding@gmail.com> - Mikko Perttunen <mperttunen@nvidia.com> properties: $nodename: pattern: "^nvdec@[0-9a-f]*$" compatible: enum: - nvidia,tegra234-nvdec reg: maxItems: 1 clocks: maxItems: 3 clock-names: items: - const: nvdec - const: fuse - const: tsec_pka resets: maxItems: 1 reset-names: items: - const: nvdec power-domains: maxItems: 1 iommus: maxItems: 1 dma-coherent: true interconnects: items: - description: DMA read memory client - description: DMA write memory client interconnect-names: items: - const: dma-mem - const: write nvidia,memory-controller: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the memory controller for determining information for the NVDEC firmware secure carveout. This carveout is configured by the bootloader and not accessible to CPU. nvidia,bl-manifest-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to bootloader manifest from beginning of firmware that was configured by the bootloader. nvidia,bl-code-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to bootloader code section from beginning of firmware that was configured by the bootloader. nvidia,bl-data-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to bootloader data section from beginning of firmware that was configured by the bootloader. nvidia,os-manifest-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to operating system manifest from beginning of firmware that was configured by the bootloader. nvidia,os-code-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to operating system code section from beginning of firmware that was configured by the bootloader. nvidia,os-data-offset: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to operating system data section from beginning of firmware that was configured by the bootloader. required: - compatible - reg - clocks - clock-names - resets - reset-names - power-domains - nvidia,memory-controller - nvidia,bl-manifest-offset - nvidia,bl-code-offset - nvidia,bl-data-offset - nvidia,os-manifest-offset - nvidia,os-code-offset - nvidia,os-data-offset additionalProperties: false examples: - | #include <dt-bindings/clock/tegra234-clock.h> #include <dt-bindings/memory/tegra234-mc.h> #include <dt-bindings/power/tegra234-powergate.h> #include <dt-bindings/reset/tegra234-reset.h> nvdec@15480000 { compatible = "nvidia,tegra234-nvdec"; reg = <0x15480000 0x00040000>; clocks = <&bpmp TEGRA234_CLK_NVDEC>, <&bpmp TEGRA234_CLK_FUSE>, <&bpmp TEGRA234_CLK_TSEC_PKA>; clock-names = "nvdec", "fuse", "tsec_pka"; resets = <&bpmp TEGRA234_RESET_NVDEC>; reset-names = "nvdec"; power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>; interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>, <&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>; interconnect-names = "dma-mem", "write"; iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>; dma-coherent; nvidia,memory-controller = <&mc>; /* Placeholder values, to be replaced with values from overlay */ nvidia,bl-manifest-offset = <0>; nvidia,bl-data-offset = <0>; nvidia,bl-code-offset = <0>; nvidia,os-manifest-offset = <0>; nvidia,os-data-offset = <0>; nvidia,os-code-offset = <0>; }; |